Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM

Liu Guozhu; Wu Jianwei; Yu Zongguang; Hong Genshen; Zheng Ruocheng; Liu Baiqin; Wu Suzhen; Du Tao

doi:doi:10.11648/j.ijmsa.20160503.19

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Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM

Liu Guozhu, Wu Jianwei, Yu Zongguang, Hong Genshen, Zheng Ruocheng, Liu Baiqin, Wu Suzhen, Du Tao

Published in International Journal of Materials Science and Applications (Volume 5, Issue 3)

Received: 18 July 2016 Published: 19 July 2016

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Abstract

The characteristics and reliability of ONO (oxide-nitride-oxide) anti-fuse devices prepared basing on 0.6µm SOI CMOS process have been studied experimentally and theoretically. The intrinsic principles of ONO dielectric breakdown were investigated with tunneling and emission models. It has been found that the conduction mechanisms of ONO dielectrics under high electric field (>10MV/cm) mainly obeys Fowler-Nordheim (F-N) tunneling and Poole-Frenkel (P-F) emission and Ohmic transport models. Meanwhile, the nitrogen depth distribution and the composition of the ONO stack films have been accurately determined using SIMS and EDX, respectively. The results indicate that the nitrogen concentration of interface between tunneling oxide and N+ sub-silicon is higher than that of interface between top oxide and N+ poly-silicon, which can contribute to prove the difference of top and bottom electrode interface barriers according to energy band diagrams of ONO anti-fuse devices. Besides, it is also found that the average breakdown voltage of ONO anti-fuse arrays and that of distribution decrease with increasing the number of anti-fuse cells, and the result is attributed to traps density of various areas. Moreover, the programming resistance of ONO anti-fuse cells and programming circuits decreases with increasing programming current, and the programming resistance of ONO anti-fuse cells can reach less than 200 ohm/cont when programming current is above 5mA. And the life of unprogrammed ONO anti-fuse devices can reach more than 40 years under an electric stress of 5.5v at the temperature from 25°C to 125°C. So, it can be concluded that the characteristics and reliability of the proposed ONO anti-fuse elements are suitable for applications in FPGA and PROM.

Published in	International Journal of Materials Science and Applications (Volume 5, Issue 3)
DOI	10.11648/j.ijmsa.20160503.19
Page(s)	169-177
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2016. Published by Science Publishing Group

Keywords

Antifuse, Oxide-Nitride-Oxide, Breakdown Voltage, Programming Resistance, SOI

References

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[2]	S. Chiang, R. Wang, T. Speers, J. McCollum, E. Hamdy, C. Hu, “Conductive channel in ONO formed by controlled dielectric breakdown,” International Symposium on VLSI Technology, Systems, and Applications, 1992, 20-21.
[3]	J. Chen, S. Eltoukhy, S. Yen, R. Wang, F. Issaq, G. Bakker, J. L. Yeh, E. Poon, D. Liu and E. Hamdy, “A modular 0.8μm technology for high performance dielectric antifuse field programmable gate arrays,” International Symposium on VLSI Technology, Systems, and Applications, 1993, 160-164.
[4]	A. Iranmanesh, Y. Karpovich, S. Yoon, “Antifuse reliability and link formation models,” International Integrated Reliability Workshop, 1994, 90-94.
[5]	M. M. Amr, Z. H. Esmat, L. M. John, “Programmable Low Impedance Anti-fuse Element,” U.S. Pat. No. 4943538, 1990.
[6]	L. M. John, “Method of forming an antifuse element with substantially reduced capacitance using the locos technique,” U.S. Pat. No. 5057451, 1991.
[7]	B. K. James, L. Shih-Chia, “Low-voltage SOI CMOS VLSI Devices and Circuits,” John Wiley & Sons, Inc., New York. 2001, 1-7.
[8]	J. R. Schwank, V. Ferlet-Cavrois, M. R. Shaneyfelt, P. Paillet, P. E. Dodd, “Radiation Effects in SOI Technologies,” IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2003, 50(3), 522-528.
[9]	G. Z. Liu, G. S. Hong, R. C. Zheng, X. D. Wu, and W. J. Yang, “High Quality of Ultra-Thin SiOxNy Films Prepared in Nitrous Oxide Ambients Using Thermal Low-Pressure Oxynitridation,” Materials and Manufacturing Processes, 2014, 29(9), 1050-1055.
[10]	N. Matsuo, H. Fujiwara, and T. Koyanagi. “Numerical analysis for conduction mechanism of thin oxide-nitride-oxide films formed on rough poly-Si,” IEEE ELECTRON DEVICE LETTERS, 1996, 17(2), 56-58.
[11]	S. S. Gong, M. E. Burnham, N. D. Theodore, and D. K. Schroder. “Evaluation of Qbd for Electrons Tunneling from the Si/Si02 Interface Compared to Electron Tunneling from the Poly-Si/Si02 Interface,” IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40(7), 1251-1257.
[12]	S. Mori, E. Sakagami, H. Araki, Y. Kaneko, K. Narita, Y. Ohshima, N. Arai, and K. Yoshikawa, “ONO Inter-Poly Dielectric Scaling for Nonvolatile Memory Applications,” IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38(2), 386-391.
[13]	Z. H. Liu, P. T. Lai, Y. C. Cheng, “Characterization of Charge Trapping and High-Field Endurance for 15-nm Thermally Nitrided Oxides,” IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38(2), 344-354.
[14]	N. Matsuo, A. Sasaki, “Electrical Characteristics of Oxide-Nitride-Oxide Films Formed on Tunnel-Structured Stacked Capacitors,” IEEE TRANSACTIONS ON ELECTRON DEVICES, 1995, 42 (1), 1340-1343.
[15]	H. Yu, Y. T. Hou, M. F. Li, D. L. Kwong, “Investigation of Hole-Tunneling Current Through Ultrathin Oxynitride/Oxide Stack Gate Dielectrics in p-MOSFETs,” IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (7), 1158-1164.
[16]	M. Wang, J. Huang, A. Anopchenko, D. Li, D. Yang, L. Pavesi, “Light emission properties and mechanism of low-temperature prepared amorphous SiNX films. II. Defect states electroluminescence,” JOURNAL OF APPLIED PHYSICS, 2008, 104(8), 083505-083505-4.
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APA Style

Liu Guozhu, Wu Jianwei, Yu Zongguang, Hong Genshen, Zheng Ruocheng, et al. (2016). Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. International Journal of Materials Science and Applications, 5(3), 169-177. https://doi.org/10.11648/j.ijmsa.20160503.19

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ACS Style

Liu Guozhu; Wu Jianwei; Yu Zongguang; Hong Genshen; Zheng Ruocheng, et al. Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. Int. J. Mater. Sci. Appl. 2016, 5(3), 169-177. doi: 10.11648/j.ijmsa.20160503.19

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AMA Style

Liu Guozhu, Wu Jianwei, Yu Zongguang, Hong Genshen, Zheng Ruocheng, et al. Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. Int J Mater Sci Appl. 2016;5(3):169-177. doi: 10.11648/j.ijmsa.20160503.19

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@article{10.11648/j.ijmsa.20160503.19,
  author = {Liu Guozhu and Wu Jianwei and Yu Zongguang and Hong Genshen and Zheng Ruocheng and Liu Baiqin and Wu Suzhen and Du Tao},
  title = {Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM},
  journal = {International Journal of Materials Science and Applications},
  volume = {5},
  number = {3},
  pages = {169-177},
  doi = {10.11648/j.ijmsa.20160503.19},
  url = {https://doi.org/10.11648/j.ijmsa.20160503.19},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ijmsa.20160503.19},
  abstract = {The characteristics and reliability of ONO (oxide-nitride-oxide) anti-fuse devices prepared basing on 0.6µm SOI CMOS process have been studied experimentally and theoretically. The intrinsic principles of ONO dielectric breakdown were investigated with tunneling and emission models. It has been found that the conduction mechanisms of ONO dielectrics under high electric field (>10MV/cm) mainly obeys Fowler-Nordheim (F-N) tunneling and Poole-Frenkel (P-F) emission and Ohmic transport models. Meanwhile, the nitrogen depth distribution and the composition of the ONO stack films have been accurately determined using SIMS and EDX, respectively. The results indicate that the nitrogen concentration of interface between tunneling oxide and N+ sub-silicon is higher than that of interface between top oxide and N+ poly-silicon, which can contribute to prove the difference of top and bottom electrode interface barriers according to energy band diagrams of ONO anti-fuse devices. Besides, it is also found that the average breakdown voltage of ONO anti-fuse arrays and that of distribution decrease with increasing the number of anti-fuse cells, and the result is attributed to traps density of various areas. Moreover, the programming resistance of ONO anti-fuse cells and programming circuits decreases with increasing programming current, and the programming resistance of ONO anti-fuse cells can reach less than 200 ohm/cont when programming current is above 5mA. And the life of unprogrammed ONO anti-fuse devices can reach more than 40 years under an electric stress of 5.5v at the temperature from 25°C to 125°C. So, it can be concluded that the characteristics and reliability of the proposed ONO anti-fuse elements are suitable for applications in FPGA and PROM.},
 year = {2016}
}

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TY  - JOUR
T1  - Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM
AU  - Liu Guozhu
AU  - Wu Jianwei
AU  - Yu Zongguang
AU  - Hong Genshen
AU  - Zheng Ruocheng
AU  - Liu Baiqin
AU  - Wu Suzhen
AU  - Du Tao
Y1  - 2016/07/19
PY  - 2016
N1  - https://doi.org/10.11648/j.ijmsa.20160503.19
DO  - 10.11648/j.ijmsa.20160503.19
T2  - International Journal of Materials Science and Applications
JF  - International Journal of Materials Science and Applications
JO  - International Journal of Materials Science and Applications
SP  - 169
EP  - 177
PB  - Science Publishing Group
SN  - 2327-2643
UR  - https://doi.org/10.11648/j.ijmsa.20160503.19
AB  - The characteristics and reliability of ONO (oxide-nitride-oxide) anti-fuse devices prepared basing on 0.6µm SOI CMOS process have been studied experimentally and theoretically. The intrinsic principles of ONO dielectric breakdown were investigated with tunneling and emission models. It has been found that the conduction mechanisms of ONO dielectrics under high electric field (>10MV/cm) mainly obeys Fowler-Nordheim (F-N) tunneling and Poole-Frenkel (P-F) emission and Ohmic transport models. Meanwhile, the nitrogen depth distribution and the composition of the ONO stack films have been accurately determined using SIMS and EDX, respectively. The results indicate that the nitrogen concentration of interface between tunneling oxide and N+ sub-silicon is higher than that of interface between top oxide and N+ poly-silicon, which can contribute to prove the difference of top and bottom electrode interface barriers according to energy band diagrams of ONO anti-fuse devices. Besides, it is also found that the average breakdown voltage of ONO anti-fuse arrays and that of distribution decrease with increasing the number of anti-fuse cells, and the result is attributed to traps density of various areas. Moreover, the programming resistance of ONO anti-fuse cells and programming circuits decreases with increasing programming current, and the programming resistance of ONO anti-fuse cells can reach less than 200 ohm/cont when programming current is above 5mA. And the life of unprogrammed ONO anti-fuse devices can reach more than 40 years under an electric stress of 5.5v at the temperature from 25°C to 125°C. So, it can be concluded that the characteristics and reliability of the proposed ONO anti-fuse elements are suitable for applications in FPGA and PROM.
VL  - 5
IS  - 3
ER  -

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Author Information

Liu Guozhu

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Wu Jianwei

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Yu Zongguang

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Hong Genshen

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Zheng Ruocheng

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Liu Baiqin

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Wu Suzhen

Key Laboratory of Radiation Hardened Integrated Circuit, China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China
Du Tao

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China

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APA Style

Liu Guozhu, Wu Jianwei, Yu Zongguang, Hong Genshen, Zheng Ruocheng, et al. (2016). Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. International Journal of Materials Science and Applications, 5(3), 169-177. https://doi.org/10.11648/j.ijmsa.20160503.19

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ACS Style

Liu Guozhu; Wu Jianwei; Yu Zongguang; Hong Genshen; Zheng Ruocheng, et al. Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. Int. J. Mater. Sci. Appl. 2016, 5(3), 169-177. doi: 10.11648/j.ijmsa.20160503.19

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AMA Style

Liu Guozhu, Wu Jianwei, Yu Zongguang, Hong Genshen, Zheng Ruocheng, et al. Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM. Int J Mater Sci Appl. 2016;5(3):169-177. doi: 10.11648/j.ijmsa.20160503.19

Copy | Download

@article{10.11648/j.ijmsa.20160503.19,
  author = {Liu Guozhu and Wu Jianwei and Yu Zongguang and Hong Genshen and Zheng Ruocheng and Liu Baiqin and Wu Suzhen and Du Tao},
  title = {Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM},
  journal = {International Journal of Materials Science and Applications},
  volume = {5},
  number = {3},
  pages = {169-177},
  doi = {10.11648/j.ijmsa.20160503.19},
  url = {https://doi.org/10.11648/j.ijmsa.20160503.19},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ijmsa.20160503.19},
  abstract = {The characteristics and reliability of ONO (oxide-nitride-oxide) anti-fuse devices prepared basing on 0.6µm SOI CMOS process have been studied experimentally and theoretically. The intrinsic principles of ONO dielectric breakdown were investigated with tunneling and emission models. It has been found that the conduction mechanisms of ONO dielectrics under high electric field (>10MV/cm) mainly obeys Fowler-Nordheim (F-N) tunneling and Poole-Frenkel (P-F) emission and Ohmic transport models. Meanwhile, the nitrogen depth distribution and the composition of the ONO stack films have been accurately determined using SIMS and EDX, respectively. The results indicate that the nitrogen concentration of interface between tunneling oxide and N+ sub-silicon is higher than that of interface between top oxide and N+ poly-silicon, which can contribute to prove the difference of top and bottom electrode interface barriers according to energy band diagrams of ONO anti-fuse devices. Besides, it is also found that the average breakdown voltage of ONO anti-fuse arrays and that of distribution decrease with increasing the number of anti-fuse cells, and the result is attributed to traps density of various areas. Moreover, the programming resistance of ONO anti-fuse cells and programming circuits decreases with increasing programming current, and the programming resistance of ONO anti-fuse cells can reach less than 200 ohm/cont when programming current is above 5mA. And the life of unprogrammed ONO anti-fuse devices can reach more than 40 years under an electric stress of 5.5v at the temperature from 25°C to 125°C. So, it can be concluded that the characteristics and reliability of the proposed ONO anti-fuse elements are suitable for applications in FPGA and PROM.},
 year = {2016}
}

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TY  - JOUR
T1  - Characterization and Modeling of a Highly Reliable ONO Antifuse for High-Performance FPGA and PROM
AU  - Liu Guozhu
AU  - Wu Jianwei
AU  - Yu Zongguang
AU  - Hong Genshen
AU  - Zheng Ruocheng
AU  - Liu Baiqin
AU  - Wu Suzhen
AU  - Du Tao
Y1  - 2016/07/19
PY  - 2016
N1  - https://doi.org/10.11648/j.ijmsa.20160503.19
DO  - 10.11648/j.ijmsa.20160503.19
T2  - International Journal of Materials Science and Applications
JF  - International Journal of Materials Science and Applications
JO  - International Journal of Materials Science and Applications
SP  - 169
EP  - 177
PB  - Science Publishing Group
SN  - 2327-2643
UR  - https://doi.org/10.11648/j.ijmsa.20160503.19
AB  - The characteristics and reliability of ONO (oxide-nitride-oxide) anti-fuse devices prepared basing on 0.6µm SOI CMOS process have been studied experimentally and theoretically. The intrinsic principles of ONO dielectric breakdown were investigated with tunneling and emission models. It has been found that the conduction mechanisms of ONO dielectrics under high electric field (>10MV/cm) mainly obeys Fowler-Nordheim (F-N) tunneling and Poole-Frenkel (P-F) emission and Ohmic transport models. Meanwhile, the nitrogen depth distribution and the composition of the ONO stack films have been accurately determined using SIMS and EDX, respectively. The results indicate that the nitrogen concentration of interface between tunneling oxide and N+ sub-silicon is higher than that of interface between top oxide and N+ poly-silicon, which can contribute to prove the difference of top and bottom electrode interface barriers according to energy band diagrams of ONO anti-fuse devices. Besides, it is also found that the average breakdown voltage of ONO anti-fuse arrays and that of distribution decrease with increasing the number of anti-fuse cells, and the result is attributed to traps density of various areas. Moreover, the programming resistance of ONO anti-fuse cells and programming circuits decreases with increasing programming current, and the programming resistance of ONO anti-fuse cells can reach less than 200 ohm/cont when programming current is above 5mA. And the life of unprogrammed ONO anti-fuse devices can reach more than 40 years under an electric stress of 5.5v at the temperature from 25°C to 125°C. So, it can be concluded that the characteristics and reliability of the proposed ONO anti-fuse elements are suitable for applications in FPGA and PROM.
VL  - 5
IS  - 3
ER  -

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